/* ------------------------------------------------------------------------- */
/*  @file:    startup_88MW320.s                                              */
/*  @purpose: CMSIS Cortex-M4 Core Device Startup File                       */
/*            88MW320                                                        */
/*  @version: 1.0                                                            */
/*  @date:    2020-9-7                                                       */
/*  @build:   b210108                                                        */
/* ------------------------------------------------------------------------- */
/*                                                                           */
/* Copyright 1997-2016 Freescale Semiconductor, Inc.                         */
/* Copyright 2016-2021 NXP                                                   */
/* All rights reserved.                                                      */
/*                                                                           */
/* SPDX-License-Identifier: BSD-3-Clause                                     */
/*****************************************************************************/
/* Version: GCC for ARM Embedded Processors                                  */
/*****************************************************************************/
    .syntax unified
    .arch armv7-m

    .section .isr_vector, "a"
    .align 2
    .globl __isr_vector
__isr_vector:
    .long   __StackTop                                      /* Top of Stack */
    .long   Reset_Handler                                   /* Reset Handler */
    .long   NMI_Handler                                     /* NMI Handler*/
    .long   HardFault_Handler                               /* Hard Fault Handler*/
    .long   MemManage_Handler                               /* MPU Fault Handler*/
    .long   BusFault_Handler                                /* Bus Fault Handler*/
    .long   UsageFault_Handler                              /* Usage Fault Handler*/
    .long   0                                               /* Reserved*/
    .long   0                                               /* Reserved*/
    .long   0                                               /* Reserved*/
    .long   0                                               /* Reserved*/
    .long   SVC_Handler                                     /* SVCall Handler*/
    .long   DebugMon_Handler                                /* Debug Monitor Handler*/
    .long   0                                               /* Reserved*/
    .long   PendSV_Handler                                  /* PendSV Handler*/
    .long   SysTick_Handler                                 /* SysTick Handler*/

                                                            /* External Interrupts*/
    .long   EXTPIN0_IRQHandler                              /* Ext. Pin 0*/
    .long   EXTPIN1_IRQHandler                              /* Ext. Pin 1*/
    .long   RTC_IRQHandler                                  /* RTC INT*/
    .long   CRC_IRQHandler                                  /* CRC INT*/
    .long   AES_IRQHandler                                  /* AES INT*/
    .long   I2C0_IRQHandler                                 /* I2C0 INT*/
    .long   I2C1_IRQHandler                                 /* I2C1 INT*/
    .long   Reserved23_IRQHandler                           /* Reserved interrupt*/
    .long   DMAC_IRQHandler                                 /* DMAC INT*/
    .long   GPIO_IRQHandler                                 /* GPIO INT*/
    .long   SSP0_IRQHandler                                 /* SSP0 INT*/
    .long   SSP1_IRQHandler                                 /* SSP1 INT*/
    .long   SSP2_IRQHandler                                 /* SSP2 INT*/
    .long   QSPI_IRQHandler                                 /* QSPI INT*/
    .long   GPT0_IRQHandler                                 /* GPT0 INT*/
    .long   GPT1_IRQHandler                                 /* GPT1 INT*/
    .long   GPT2_IRQHandler                                 /* GPT2 INT*/
    .long   GPT3_IRQHandler                                 /* GPT3 INT*/
    .long   UART0_IRQHandler                                /* UART0 INT*/
    .long   UART1_IRQHandler                                /* UART1 INT*/
    .long   UART2_IRQHandler                                /* UART2 INT*/
    .long   Reserved37_IRQHandler                           /* Reserved interrupt*/
    .long   WDT_IRQHandler                                  /* WDT INT*/
    .long   Reserved39_IRQHandler                           /* Reserved interrupt*/
    .long   ADC0_IRQHandler                                 /* ADC0 INT*/
    .long   DAC_IRQHandler                                  /* DAC INT*/
    .long   ACOMP_WAKEUP_IRQHandler                         /* ACOMP Wake-up INT*/
    .long   ACOMP_IRQHandler                                /* ACOMP INT*/
    .long   SDIO_IRQHandler                                 /* SDIO INT*/
    .long   USB_IRQHandler                                  /* USB INT*/
    .long   Reserved46_IRQHandler                           /* Reserved interrupt*/
    .long   PLL_IRQHandler                                  /* PLL INT*/
    .long   Reserved48_IRQHandler                           /* Reserved interrupt*/
    .long   RC32M_IRQHandler                                /* RC32M INT FUNC*/
    .long   GPIO_0_1_IRQHandler                             /* External Pin 0 selected by PMU.EXT_SEL_REG*/
    .long   GPIO_2_3_IRQHandler                             /* External Pin 1 selected by PMU.EXT_SEL_REG*/
    .long   GPIO_4_5_IRQHandler                             /* External Pin 2 selected by PMU.EXT_SEL_REG*/
    .long   GPIO_6_7_IRQHandler                             /* External Pin 3 selected by PMU.EXT_SEL_REG*/
    .long   GPIO_8_9_IRQHandler                             /* External Pin 4 selected by PMU.EXT_SEL_REG*/
    .long   GPIO_10_11_IRQHandler                           /* External Pin 5 selected by PMU.EXT_SEL_REG*/
    .long   GPIO_12_13_IRQHandler                           /* External Pin 6 selected by PMU.EXT_SEL_REG*/
    .long   GPIO_14_15_IRQHandler                           /* External Pin 7 selected by PMU.EXT_SEL_REG*/
    .long   GPIO_16_17_IRQHandler                           /* External Pin 8 selected by PMU.EXT_SEL_REG*/
    .long   GPIO_18_19_IRQHandler                           /* External Pin 9 selected by PMU.EXT_SEL_REG*/
    .long   GPIO_20_21_IRQHandler                           /* External Pin 10 selected by PMU.EXT_SEL_REG*/
    .long   GPIO_22_23_IRQHandler                           /* External Pin 11 selected by PMU.EXT_SEL_REG*/
    .long   GPIO_24_25_IRQHandler                           /* External Pin 12 selected by PMU.EXT_SEL_REG*/
    .long   GPIO_26_27_IRQHandler                           /* External Pin 13 selected by PMU.EXT_SEL_REG*/
    .long   GPIO_28_29_IRQHandler                           /* External Pin 14 selected by PMU.EXT_SEL_REG*/
    .long   GPIO_30_31_IRQHandler                           /* External Pin 15 selected by PMU.EXT_SEL_REG*/
    .long   GPIO_32_33_IRQHandler                           /* External Pin 16 selected by PMU.EXT_SEL_REG*/
    .long   GPIO_34_35_IRQHandler                           /* External Pin 17 selected by PMU.EXT_SEL_REG*/
    .long   GPIO_36_37_IRQHandler                           /* External Pin 18 selected by PMU.EXT_SEL_REG*/
    .long   GPIO_38_39_IRQHandler                           /* External Pin 19 selected by PMU.EXT_SEL_REG*/
    .long   GPIO_40_41_IRQHandler                           /* External Pin 20 selected by PMU.EXT_SEL_REG*/
    .long   GPIO_42_43_IRQHandler                           /* External Pin 21 selected by PMU.EXT_SEL_REG*/
    .long   GPIO_44_45_IRQHandler                           /* External Pin 22 selected by PMU.EXT_SEL_REG*/
    .long   GPIO_46_47_IRQHandler                           /* External Pin 23 selected by PMU.EXT_SEL_REG*/
    .long   GPIO_48_49_IRQHandler                           /* External Pin 24 selected by PMU.EXT_SEL_REG*/
    .long   Reserved75_IRQHandler                           /* Reserved interrupt*/
    .long   PMU_IRQHandler                                  /* ULP COMP*/
    .long   BRNOUT_IRQHandler                               /* Brnout INT*/
    .long   WIFIWKUP_IRQHandler                             /* WiFi Wakeup INT*/

    .size    __isr_vector, . - __isr_vector

    .text
    .thumb

/* Reset Handler */

    .thumb_func
    .align 2
    .globl   Reset_Handler
    .weak    Reset_Handler
    .type    Reset_Handler, %function
Reset_Handler:
    cpsid   i               /* Mask interrupts */
    .equ    VTOR, 0xE000ED08
    ldr     r0, =VTOR
    ldr     r1, =__isr_vector
    str     r1, [r0]
    ldr     r2, [r1]
    msr     msp, r2
#ifndef __NO_SYSTEM_INIT
    ldr   r0,=SystemInit
    blx   r0
#endif
/*     Loop to copy data from read only memory to RAM. The ranges
 *      of copy from/to are specified by following symbols evaluated in
 *      linker script.
 *      __etext: End of code section, i.e., begin of data sections to copy from.
 *      __data_start__/__data_end__: RAM address range that data should be
 *      copied to. Both must be aligned to 4 bytes boundary.  */

    ldr    r1, =__etext
    ldr    r2, =__data_start__
    ldr    r3, =__data_end__

#ifdef __PERFORMANCE_IMPLEMENTATION
/* Here are two copies of loop implementations. First one favors performance
 * and the second one favors code size. Default uses the second one.
 * Define macro "__PERFORMANCE_IMPLEMENTATION" in project to use the first one */
    subs    r3, r2
    ble    .LC1
.LC0:
    subs    r3, #4
    ldr    r0, [r1, r3]
    str    r0, [r2, r3]
    bgt    .LC0
.LC1:
#else  /* code size implemenation */
.LC0:
    cmp     r2, r3
    ittt    lt
    ldrlt   r0, [r1], #4
    strlt   r0, [r2], #4
    blt    .LC0
#endif

#ifdef __STARTUP_CLEAR_BSS
/*     This part of work usually is done in C library startup code. Otherwise,
 *     define this macro to enable it in this startup.
 *
 *     Loop to zero out BSS section, which uses following symbols
 *     in linker script:
 *      __bss_start__: start of BSS section. Must align to 4
 *      __bss_end__: end of BSS section. Must align to 4
 */
    ldr r1, =__bss_start__
    ldr r2, =__bss_end__

    movs    r0, 0
.LC2:
    cmp     r1, r2
    itt    lt
    strlt   r0, [r1], #4
    blt    .LC2
#endif /* __STARTUP_CLEAR_BSS */

    cpsie   i               /* Unmask interrupts */
#ifndef __START
#define __START _start
#endif
#ifndef __ATOLLIC__
    ldr   r0,=__START
    blx   r0
#else
    ldr   r0,=__libc_init_array
    blx   r0
    ldr   r0,=main
    bx    r0
#endif
    .pool
    .size Reset_Handler, . - Reset_Handler

    .align  1
    .thumb_func
    .weak DefaultISR
    .type DefaultISR, %function
DefaultISR:
    b DefaultISR
    .size DefaultISR, . - DefaultISR

    .align 1
    .thumb_func
    .weak NMI_Handler
    .type NMI_Handler, %function
NMI_Handler:
    ldr   r0,=NMI_Handler
    bx    r0
    .size NMI_Handler, . - NMI_Handler

    .align 1
    .thumb_func
    .weak HardFault_Handler
    .type HardFault_Handler, %function
HardFault_Handler:
    ldr   r0,=HardFault_Handler
    bx    r0
    .size HardFault_Handler, . - HardFault_Handler

    .align 1
    .thumb_func
    .weak SVC_Handler
    .type SVC_Handler, %function
SVC_Handler:
    ldr   r0,=SVC_Handler
    bx    r0
    .size SVC_Handler, . - SVC_Handler

    .align 1
    .thumb_func
    .weak PendSV_Handler
    .type PendSV_Handler, %function
PendSV_Handler:
    ldr   r0,=PendSV_Handler
    bx    r0
    .size PendSV_Handler, . - PendSV_Handler

    .align 1
    .thumb_func
    .weak SysTick_Handler
    .type SysTick_Handler, %function
SysTick_Handler:
    ldr   r0,=SysTick_Handler
    bx    r0
    .size SysTick_Handler, . - SysTick_Handler

    .align 1
    .thumb_func
    .weak I2C0_IRQHandler
    .type I2C0_IRQHandler, %function
I2C0_IRQHandler:
    ldr   r0,=I2C0_DriverIRQHandler
    bx    r0
    .size I2C0_IRQHandler, . - I2C0_IRQHandler

    .align 1
    .thumb_func
    .weak I2C1_IRQHandler
    .type I2C1_IRQHandler, %function
I2C1_IRQHandler:
    ldr   r0,=I2C1_DriverIRQHandler
    bx    r0
    .size I2C1_IRQHandler, . - I2C1_IRQHandler

    .align 1
    .thumb_func
    .weak DMAC_IRQHandler
    .type DMAC_IRQHandler, %function
DMAC_IRQHandler:
    ldr   r0,=DMAC_DriverIRQHandler
    bx    r0
    .size DMAC_IRQHandler, . - DMAC_IRQHandler

    .align 1
    .thumb_func
    .weak SSP0_IRQHandler
    .type SSP0_IRQHandler, %function
SSP0_IRQHandler:
    ldr   r0,=SSP0_DriverIRQHandler
    bx    r0
    .size SSP0_IRQHandler, . - SSP0_IRQHandler

    .align 1
    .thumb_func
    .weak SSP1_IRQHandler
    .type SSP1_IRQHandler, %function
SSP1_IRQHandler:
    ldr   r0,=SSP1_DriverIRQHandler
    bx    r0
    .size SSP1_IRQHandler, . - SSP1_IRQHandler

    .align 1
    .thumb_func
    .weak SSP2_IRQHandler
    .type SSP2_IRQHandler, %function
SSP2_IRQHandler:
    ldr   r0,=SSP2_DriverIRQHandler
    bx    r0
    .size SSP2_IRQHandler, . - SSP2_IRQHandler

    .align 1
    .thumb_func
    .weak QSPI_IRQHandler
    .type QSPI_IRQHandler, %function
QSPI_IRQHandler:
    ldr   r0,=QSPI_DriverIRQHandler
    bx    r0
    .size QSPI_IRQHandler, . - QSPI_IRQHandler

    .align 1
    .thumb_func
    .weak UART0_IRQHandler
    .type UART0_IRQHandler, %function
UART0_IRQHandler:
    ldr   r0,=UART0_DriverIRQHandler
    bx    r0
    .size UART0_IRQHandler, . - UART0_IRQHandler

    .align 1
    .thumb_func
    .weak UART1_IRQHandler
    .type UART1_IRQHandler, %function
UART1_IRQHandler:
    ldr   r0,=UART1_DriverIRQHandler
    bx    r0
    .size UART1_IRQHandler, . - UART1_IRQHandler

    .align 1
    .thumb_func
    .weak UART2_IRQHandler
    .type UART2_IRQHandler, %function
UART2_IRQHandler:
    ldr   r0,=UART2_DriverIRQHandler
    bx    r0
    .size UART2_IRQHandler, . - UART2_IRQHandler

    .align 1
    .thumb_func
    .weak SDIO_IRQHandler
    .type SDIO_IRQHandler, %function
SDIO_IRQHandler:
    ldr   r0,=SDIO_DriverIRQHandler
    bx    r0
    .size SDIO_IRQHandler, . - SDIO_IRQHandler


/*    Macro to define default handlers. Default handler
 *    will be weak symbol and just dead loops. They can be
 *    overwritten by other handlers */
    .macro def_irq_handler  handler_name
    .weak \handler_name
    .set  \handler_name, DefaultISR
    .endm

/* Exception Handlers */
    def_irq_handler    MemManage_Handler
    def_irq_handler    BusFault_Handler
    def_irq_handler    UsageFault_Handler
    def_irq_handler    DebugMon_Handler
    def_irq_handler    EXTPIN0_IRQHandler
    def_irq_handler    EXTPIN1_IRQHandler
    def_irq_handler    RTC_IRQHandler
    def_irq_handler    CRC_IRQHandler
    def_irq_handler    AES_IRQHandler
    def_irq_handler    I2C0_DriverIRQHandler
    def_irq_handler    I2C1_DriverIRQHandler
    def_irq_handler    Reserved23_IRQHandler
    def_irq_handler    DMAC_DriverIRQHandler
    def_irq_handler    GPIO_IRQHandler
    def_irq_handler    SSP0_DriverIRQHandler
    def_irq_handler    SSP1_DriverIRQHandler
    def_irq_handler    SSP2_DriverIRQHandler
    def_irq_handler    QSPI_DriverIRQHandler
    def_irq_handler    GPT0_IRQHandler
    def_irq_handler    GPT1_IRQHandler
    def_irq_handler    GPT2_IRQHandler
    def_irq_handler    GPT3_IRQHandler
    def_irq_handler    UART0_DriverIRQHandler
    def_irq_handler    UART1_DriverIRQHandler
    def_irq_handler    UART2_DriverIRQHandler
    def_irq_handler    Reserved37_IRQHandler
    def_irq_handler    WDT_IRQHandler
    def_irq_handler    Reserved39_IRQHandler
    def_irq_handler    ADC0_IRQHandler
    def_irq_handler    DAC_IRQHandler
    def_irq_handler    ACOMP_WAKEUP_IRQHandler
    def_irq_handler    ACOMP_IRQHandler
    def_irq_handler    SDIO_DriverIRQHandler
    def_irq_handler    USB_IRQHandler
    def_irq_handler    Reserved46_IRQHandler
    def_irq_handler    PLL_IRQHandler
    def_irq_handler    Reserved48_IRQHandler
    def_irq_handler    RC32M_IRQHandler
    def_irq_handler    GPIO_0_1_IRQHandler
    def_irq_handler    GPIO_2_3_IRQHandler
    def_irq_handler    GPIO_4_5_IRQHandler
    def_irq_handler    GPIO_6_7_IRQHandler
    def_irq_handler    GPIO_8_9_IRQHandler
    def_irq_handler    GPIO_10_11_IRQHandler
    def_irq_handler    GPIO_12_13_IRQHandler
    def_irq_handler    GPIO_14_15_IRQHandler
    def_irq_handler    GPIO_16_17_IRQHandler
    def_irq_handler    GPIO_18_19_IRQHandler
    def_irq_handler    GPIO_20_21_IRQHandler
    def_irq_handler    GPIO_22_23_IRQHandler
    def_irq_handler    GPIO_24_25_IRQHandler
    def_irq_handler    GPIO_26_27_IRQHandler
    def_irq_handler    GPIO_28_29_IRQHandler
    def_irq_handler    GPIO_30_31_IRQHandler
    def_irq_handler    GPIO_32_33_IRQHandler
    def_irq_handler    GPIO_34_35_IRQHandler
    def_irq_handler    GPIO_36_37_IRQHandler
    def_irq_handler    GPIO_38_39_IRQHandler
    def_irq_handler    GPIO_40_41_IRQHandler
    def_irq_handler    GPIO_42_43_IRQHandler
    def_irq_handler    GPIO_44_45_IRQHandler
    def_irq_handler    GPIO_46_47_IRQHandler
    def_irq_handler    GPIO_48_49_IRQHandler
    def_irq_handler    Reserved75_IRQHandler
    def_irq_handler    PMU_IRQHandler
    def_irq_handler    BRNOUT_IRQHandler
    def_irq_handler    WIFIWKUP_IRQHandler

    .end
